The 74LS194 bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a shift register; they feature parallel inputs, parallel outputs, right-shift and left-shift serial inputs, operating-mode-control inputs, and a direct overriding clear line. The register has four distinct modes of operation, namely: Parallel load, Shift right, Shift left, Inhibit clock. Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode control inputs, S0 and S1, HIGH. The data is loaded into the associated flip-flops and appear at the outputs after the positive transition of the clock input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising edge of the clock pulse when S0 is HIGH and S1 is LOW. Serial data for this mode is entered at the shift-right data input. When S0 is LOW and S1 is HIGH, data shifts left synchronously, and new data is entered at the shift-left serial input. Clocking of the flip-flop is inhibited when both mode control inputs are LOW.
- Operating Voltage: 5V
- Supply Current: 23mA
- Supply frequency: 20MHz
- Parallel inputs and outputs
- Four operating modes: Synchronous parallel load Right shift Left shift Do nothing
- Positive edge-triggered clocking
- Direct overriding clear
Here S1 and S0 are Mode Control Inputs, P0, P1, P2 and P3 are parallel data inputs. DSL and DSR are Serial Data Inputs, CP is Clock Input (Active High Edge), Q0 to Q3 are Parallel Data Output and MR stands for Master Reset.
1× 74LS194 - 4-bit Bi-directional Shift Register IC
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